Computer security refers to information security associated with computer platforms. The objective of computer security is to ensure the confidentiality, integrity, and/or availability of information that is stored or processed on the computer platform. Computer security may reduce the vulnerability of computer-based information to malicious software and hardware based user attacks. Computing platforms therefore include physical and logical features to provide a secure execution environment (SEE). A monotonic counter may be included as part of the SEE and may be used in combination with various authentication procedures to prevent user attacks.
A monotonic counter is implemented to produce incrementing or decrementing values. For the incrementing values implementation, once the count value changes to a higher number, it should not thereafter exhibit any value less than the higher number. For the decrementing values implementation, once the count value changes to a lower number, it should not thereafter exhibit any value greater than the lower number. For either implementation, the monotonic nature of the count value should be maintained throughout the life of the device in which the monotonic counter operates, including across any number of power-on and power-off cycles. Causing a monotonic counter to not maintain its count value and revert to an earlier value can result in a compromise in the device's security (referred to herein as a “replay attack”).
Computer platforms may utilize a specific memory module for storing boot instructions (e.g., basic input output system (BIOS) instructions). A serial peripheral interface (SPI) flash memory device is commonly used as a storage for these instructions. SPI flash memory is an ideal candidate for storing monotonic counters; however, standard SPI Flash memory devices do not support a mechanism to protect monotonic counter values from replay attacks (thus, availability of reliable monotonic counters for devices provides the fundamental capability to build replay protection).
Prior art solutions for replay protection of monotonic counters can be built with on-chip flash; however on-chip flash is not always possible with high performance silicon devices for silicon processing reasons, and without adding substantial cost. Prior art solutions can also be built with on-chip static random access memory (SRAM) with modest cost; however on-chip SRAM needs to be powered up at all times. If power is removed, the data in the SRAM is lost. Prior art solutions that utilize monotonic counters may move them to a different memory device that provides replay protected memory—e.g. an embedded multi-media card (eMMC) device; however, these prior art solutions provide the replay protection using a large block of memory at a very significant cost.
Descriptions of certain details and implementations follow, including a description of the figures, which may depict some or all of the embodiments described below, as well as discussing other potential embodiments or implementations of the inventive concepts presented herein. An overview of embodiments of the invention is provided below, followed by a more detailed description with reference to the drawings.